Systolic Array Processors: Contributions by Speakers at the International Conference on Systolic Arrays Held at Killarney, Co. Kerry, Ireland, 1989J. V. McCanny, John McWhirter, Earl E. Swartzlander Prentice Hall, 1989 - 652 Seiten |
Inhalt
Application of the Warp Processor to Adaptive Beamforming | 13 |
Performance Analysis of DataDriven Networks | 33 |
P Gosling J E Hudson STC Technology Ltd Essex | 52 |
Urheberrecht | |
21 weitere Abschnitte werden nicht angezeigt.
Andere Ausgaben - Alle anzeigen
Häufige Begriffe und Wortgruppen
adaptive beamforming adder applications arithmetic array architecture array processor ASP module basic binary Bit serial block butterfly cache carry-save cell chip circuit clock cycle coefficient column complexity computation Conf configuration connected convolver data stream delay digit serial digital filter Digital Signal Processing Discrete Cosine Transform efficient equations fault fault-tolerant FIR filter full adder function hardware IEEE IEEE Trans input data interconnection iteration Kalman filtering Kung latches latency linear array logic mapping matrix memory method multiplier node operations output parallel computer PE's performance pipelining problem Proc processing elements processor array QR decomposition reconfiguration recursive redundant rotation samples scheme shift register shown in Figure Signal Processing slices solution stage step structure systolic algorithm systolic architectures systolic array technique throughput transform transistor triangular two's complement update values vector VLSI VLSI implementation wafer Warp zero